The present invention relates to a resistive memory device and a method for fabricating the same, and more particularly, to a resistive memory device which uses resistance change, such as a resistive random access memory (ReRAM) device, and a method for fabricating the same.
Recently, researches on next-generation memory device, which can replace Dynamic Random Access Memory (DRAM) and flash memory, are actively being conducted. One of such next-generation memory device is a resistive memory device that uses a resistive layer. The resistive layer includes a material of which resistance rapidly changes according to the applied bias and a switching is performed between two or more different resistive states.
FIG. 1 illustrates a cross-sectional view of a typical resistive memory device.
Referring to FIG. 1, the typical resistive memory device includes a substrate 10 which has a predetermined structure formed therein, a first insulation layer 11 formed over the substrate 10, and a first contact plug 12 which passes through the first insulation layer 11 and is connected with the substrate 10.
Subsequently, a lower electrode 13, a resistive layer 14, and an upper electrode 15 are sequentially formed over the first insulation layer 11 and the first contact plug 12. Then, a resistive unit of a stack structure is formed by etching the lower electrode 13, the resistive layer 14, and the upper electrode 15.
Subsequently, after a second insulation layer 16 is formed over a result structure including the resistive unit, a second contact plug 12 is formed by passing through the second insulation layer 16 to be connected with the upper electrode 15.
The switching mechanism of the resistive memory device having the above-described structure will be briefly described herein.
When a bias is applied to the lower and upper electrodes 13 and 15, conductive filaments may be generated through a rearrangement of oxygen vacancies in the resistive layer 14 or the oxygen vacancies are removed and, as a result, the conductive filaments generated before are removed based on the applied bias. The resistive layer 14 represents the two resistance states distinguished by the generation or removal of the conductive filaments. In other words, when the conductive filaments is generated, the resistance changing device represents a low resistance state, and when the conductive filaments are removed, the resistance changing device represents a high resistance state. Herein, an operation of generating the conductive filaments in the resistive layer 14 and representing the low resistance state is called a set operation. Conversely, an operation of removing the conductive filaments in the resistive layer 14 and representing the high resistance state is called a reset operation.
However, in the conventional resistive memory device, concentration degrees of electric fields between a core part and an edge part of the resistive unit are different according to a profile of the lower and upper electrodes 13 and 15. As a result, distribution regarding switching characteristics of the resistive unit is degraded.
As described above, when the resistive unit is formed by etching the lower electrode 13, the resistive layer 14, and the upper electrode 15, an edge part of the lower and upper electrodes 13 and 15, which comes in contact with the resistive layer 14, has a profile of a sharp-pointed shape {circle around (1)} as shown in FIG. 1.
Accordingly, since the electric fields are concentrated in the edge part of the lower and upper electrodes 13 and 15, the edge part switches earlier than the core part. As a result, distribution of a sensing current are not uniform in the resistive unit, and the switching characteristic of the resistive unit is degraded. Further, a leakage current may occur at the edge part of the resistive unit, and a sensing margin becomes narrower since an on/off ratio of a selection element is deteriorated.